Call for Papers

The IEEE European Test Symposium (ETS) is Europe’s premier forum dedicated to presenting and discussing scientific results, emerging ideas, applications, hot topics and new trends in the area of electronic-based circuits and system testing, reliability, security and validation. ETS’22 will be held in Casa Convalescència, located in the historical modernist site Hospital de la Santa Creu i Sant Pau (World Heritage Site by UNESCO, 1997) 10 minutes walking from the Sagrada Familia in Barcelona. On-line participation will be possible (see COVID19 Status menu). ETS’22 is organized by UPC (Universitat Politècnica de Catalunya).

The program includes keynotes, scientific paper presentations, panels, tutorials, workshops and highlights/demos from industry. Besides regular technical papers, ETS’22 provides the opportunity of submitting scientific contributions for hot-topic papers and case-study papers (each with specific evaluation criteria). Submissions are also solicited for special sessions, tutorials, panels and workshops, as well as for the PhD Forum. Linked to the main ETS’22 symposium, the Test Spring School and Fringe Workshops will be organized.

You are invited to participate and submit your contributions to ETS'22. The areas of interest include (but are not limited to) the following topics:.

TECHNIQUES AND METHODOLOGIES

Electronic Testing:

  • Adaptive Test
  • ATE Hardware and Software
  • Automatic Test Generation
  • Built-In Self-Test
  • Defect-Based Test
  • Delay, Jitter and Perform. Test
  • Defect mechanisms
  • Dependability
  • Design for Reliability
  • Design for Test
  • Embedded test and measurement instruments
  • Fault Modeling and Simulation
  • Fault Tolerance
  • Functional Safety
  • Low-Power Test
  • Machine Learning and AI for Test
  • On-Line Test
  • Power and Thermal-Aware Test
  • Reliability, Self-Repair
  • Signal Integrity Test
  • Verification and Validation

Diagnosis:

  • Defect Diagnosis
  • Fault Diagnosis
  • Failure Analysis
  • Machine Learning and AI for Diagnosis
  • Silicon Debug

Security:

  • Design for Security
  • Hardware Security
  • Hardware Trust
  • Security Issues in Test
  • Trojan Detection

Manufacturing and Test:

  • Economics of Test
  • Design for Manufacturing
  • Design for Yield
  • Standards
  • Yield Analysis and Enhancement

TEST VEHICLES AND ARCHITECTURES 

Devices, Circuits and Systems:

  • Analog and Mixed-Signal
  • Boards, Digital circuits and IPs
  • Embedded systems
  • High-speed digital, Memories
  • Microsystems, MEMS sensors
  • NoCs

Emerging architectures:

  • Approximate Circuits
  •  In-memory computing
  • Neuromorphic architectures
  • Photonics architectures
  • Quantum architect

 

  • SoCs and embedded IPs
  • Stacked/3D ICs
  • Reconfigurable Systems
  • Reversible and quantum devices
  • RF, Micro and mmWave
  • Photonics devices

Publications:

ETS'22 will produce Formal Proceedings of scientific papers with ISBN number that will be indexed by the IEEE Xplore Digital Library. All accepted technical papers submitted in one of the three categories (regular, poster, hot topic, and case study) will be included in the formal Proceedings (each following its own guidelines).

Submissions:

ETS’22 seeks original, unpublished contributions of the following types:

Key Dates for Submissions

For the submission, please check at the specific type you wish to do at the lateral menu.

 A PDF version of this call for papers can be found here.